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Senior Technical Program Manager - Packaging Development
Location:
Santa Clara, CA
Description:
Job Description Intel Silicon Photonics Product Division (SPPD) is at the forefront of silicon photonics integration and is at the heart of Intel's transformation from a PC company to a company that powers the cloud and billions of smart, connected computing-devices. Since announcing the world's first hybrid silicon laser nearly a decade ago, our team continues to lead the industry with cutting-edge technology and efficient, scalable high-volume manufacturing. Our dedication to advanced development ensures that Intel Silicon Photonics continues to drive future data center bandwidth growth with smaller form factors, co-packaging and higher speeds from 800G today to 1.6T+ and beyond tomorrow. We are looking for great talent to accelerate this journey so if you are interested in joining our leading organization then we want to hear from you.We are seeking a seasoned execution leader to help drive advanced packaging development and commercialization of our cutting-edge optical interconnect products, which are set to revolutionize data center connectivity and XPU I/O. These innovative products are designed to achieve exceptionally high bandwidth density and energy efficiency, necessitating breakthroughs in design, photonic and electrical integrated circuits, engine packaging, testing, and production processes. As a pivotal figure within our interdisciplinary team, your responsibilities will include but not limited to : Orchestrating a collaborative, cross-functional team spanning various divisions within a vast organization to establish and articulate a definitive Plan of Record (POR). Coordinating the interplay and cohesive integration of multiple projects, teams, and stakeholders. Navigating through uncertainty, seizing opportunities, and instilling decision-making frameworks to evaluate and prioritize a range of strategic and operational choices, ensuring resolution of issues with an unwavering commitment to quality. Guiding program strategies by assessing and reconciling the technical requirements against the business implications of project and program decisions, all while operating within established parameters Specific job responsibilities include but not limited to : Oversees and guides the Photonic ICs (PICs), Electronic ICs (EICs) and/or packaging development efforts from project initiation through initial production ramp. Charting the course for our segment of groundbreaking new product platforms, collaborating with external divisions to define and deliver strategic technical program outcomes, and effectively communicating these developments. Creating program level timeline to understand work stream dependencies and sequencing. Clearly communicates expectations for work output and completion dates to technical team members and partners. Serving as the liaison among various teams, including fabrication, Optical design, Hardware design, Firmware, IC, Test, Operations, and Quality, to facilitate product development and support high-volume manufacturing (HVM) ramp-up. Orchestrating alternative design strategies as a contingency for designs with high risk. Monitoring and reporting on budget allocations and weekly progress toward development milestones. Providing motivation and encouragement to team members to achieve project milestones. Fostering strong, positive working relationships with all product stakeholders through prompt responses, transparent communication, and by addressing their specific product development needs at any given time. Collaborating with stakeholders to ensure manufacturing readiness across fabrication, assembly, and testing facilities, which includes managing engineering sample production, wafer start planning, product qualification strategy, capacity analysis, and certification of assembly and test sites. Qualifications Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: The candidate must possess a Bachelor's degree in Physics, Electrical Engineering or related discipline with 6+ years of STEM experience 3+ years of experience in at least one of the following: End to end High-Speed Optical component/product development, Silicon fab or Wafer level assembly process development Preferred Qualifications: Master's degree with 6+ years of experience in Physics, Electrical Engineering or related discipline. 3+ years of experience working on fab process development. 3+ years of experience in program management. 3+ years of experience in Wafer Level assembly process development For information on Intel's immigration sponsorship guidelines, please see Intel U.S. Immigration Sponsorship Information . Inside this Business Group Corporate Strategy Office is chartered to support the executive office in driving corporate initiatives, including near and long-term strategy, major cross-group decision making and ensuring cross-company alignment. To deliver to that mission, the team owns shaping, driving and synthesizing insights to directionally orient trends as well as long range strategic planning/visioning , cross company alignment and greenfield innovation. Communications are essential to drive alignment so there is a focus on communications, community and acumen development. The team is ccommitted to ensuring that Intel efforts are aligned to, and actively driving success toward the most impactful business strategies. Other Locations US, NM, Albuquerque; US, OR, Hillsboro; US, AZ, Phoenix; US, CA, Folsom Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. Annual Salary Range for jobs which could be performed in US, California: $123,139.00-$203,801.00*Salary range dependent on a number of factors including location and experience Working Model This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs. Requisition #: JR0263043pca3lyuhf
Company:
Intel
Posted:
May 3 on ITJobsWeb
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More About this Listing: Senior Technical Program Manager - Packaging Development
Senior Technical Program Manager - Packaging Development is a Executive Program Manager Job at Intel located in Santa Clara CA. Find other listings like Senior Technical Program Manager - Packaging Development by searching Oodle for Executive Program Manager Jobs.
Senior Technical Program Manager - Packaging Development is a Executive Program Manager Job at Intel located in Santa Clara CA. Find other listings like Senior Technical Program Manager - Packaging Development by searching Oodle for Executive Program Manager Jobs.